The application relates to a semiconductor device with a charge carrier compensation structure in a semiconductor body and a process for the production of same.
Semiconductor devices are used as power transistors and due to the charge carrier compensation structure achieve a Ron with significantly smaller chip areas than traditional power transistors. As a result their gate capacitances are considerably smaller, permitting them to be switched more quickly. However, they are at the same time more susceptible to vibrations and produce high voltage spikes due to their fast switching flanks. In such arrangements there is a fast drop in both gate-drain capacitance CGD, also referred to as reverse transfer capacitance, and source-drain capacitance CSD as supply voltage VDS increases for certain applications. Extremely small capacitance values which exacerbate the disadvantages outlined above are reached even at moderate voltages VDS.
For these and other reasons, there is a need for the present invention.